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Altera_Forum's avatar
Altera_Forum
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13 years ago

Multiple Nios II and Qsys

Hello, Is there anybody that used/have experience with Qsys to fit five Nios II on a Cyclone IV EP4CE22 FPGA? I could only fit one. I need to use SDRAM controller. I'd like to know how many...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

It will depend on the cpu type and options, IIRC you can get a cpu below 3000 LE.

Remove everything you don't actually need - including most of (or all) the JTAG debug module.

However, if you are trying to run 5 cpu reading code/data from SDRAM the working set better be small and fit in the (small) caches - otherwise all the cpu will always be waiting for memory.