Multiple CPU or Nios II?

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originally posted by stephenm@Apr 24 2006, 01:25 PM

my first question is how do i convert "cycle time" and "-iord/-iowr" timing etc from the spec to the "read_wait_states" etc of the ptf file in nios

my second question is why would i be getting such different answers for two supposedly identical cards?

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Hi StephenM,

In general I wouldn&#39;t edit the PTF unless is it absolutly necessary and I know what I&#39;m modiflying. For the timing parameters in the PTF these I believe are part of the interface timing with the CFI memory. See the data sheet on the CFI component:

http://www.altera.com/literature/hb/nios2/n2cpu_nii51013.pdf (http://www.altera.com/literature/hb/nios2/n2cpu_nii51013.pdf)

Look at page 2-4 - Timing Tab.

If you open the CFI component and click on the Timing tab this will allow you to define the timing parameter for the CFI component and give you the timing waveform relationships for read and write cycles with respect to your system clock.

The set-up, hold and waitstates "cycles" are a function of the CFI memory timing specs and the system clock speed. As the CFI memory timing and the system clock speeds are fixed numbers - I would expect to see roughly the same performance throught the CFI interfacec. The SOPC Builder tool will figure out the number of system clock "cycles" to meet the CFI memory&#39;s set-up, hold and waitstates.

By editing the PTF directly, I can&#39;t be sure if you are still operating within the CFI memory data sheet timing specs.

Also without any details on how you performed the data throughput tests I can&#39;t be sure why the two cards show different timing numbers (and that you could be operating out of the CFI memory timing specs).

I hope this helps.

Regards,

ATJ