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21 years ago --- Quote Start --- originally posted by kaku817+feb 17 2005, 03:15 am--><div class='quotetop'>quote (kaku817 @ feb 17 2005, 03:15 am)</div>
--- quote start ---
<!--quotebegin-camelot@Feb 5 2005, 06:25 AM you should to change video_clk into pll to 25 mhz, but not clk of dac. --- Quote End --- It needs change both the vdeio_clk to 25.175Mhz and the PCB design of Lancelot board. In the Lancelot board, you must cut-off 1-2 connection of J1, connect 2-3 of J1, and add a 25.175Mhz OSC to X1. Of couse the related registers of Lancelot board must be also changed to match 640*480 mode. Now, because the clk for video DAC is from 25.175MHz OSC of Lancelot board, not from buffered clk from PIN_E15, you can maintain the PIN_E15 to 50 MHz to SDRAM devices and CPU. Hope this is helpful. -- Kaku [/b] --- Quote End --- Sorry, I am wrong... Camelot is right. No additional H/W modification is needed! It needs only change 'vga_clk' to 25MHz and maintains PLD_CLKOUT (PIN_E15) in 50MHz. Of couse the related registers of Lancelot board must be also changed to match 640*480 mode. -- Kaku