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Honored Contributor
Honored ContributorMultiple Clock
Hi everyone, I try to implement a system with multiple clock domains. The NIOS system run with 50 Mhz and some avalon components should run with 100 Mhz (DMA, FIFO, internal SRAM). SOPC Builder...
Altera_ForumHonored Contributor
Honored ContributorAdd SignalTap II to the list as well.
I used a seperate clock for a custom peripheral on a uKit board, it built and works fine. The periperhal clock was 1/3 slower than system. Both clocks originated from same PLL. Have you tried a faster clock for CPU and slower for other, just as a test?
