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Altera_Forum
Honored Contributor
Honored ContributorMultiple-Clock Domain with 2 Nios?
Hello, I tried the new multiple-clock domain feature (Quartus 4.2, Nios1.1) with a Cyclone evaluation board. One Nios should boot from flash and run out of SDRAM, the other Nios should also b...
Altera_ForumHonored Contributor
Honored ContributorIf I have a multi processor system, I MUST have two projects in the IDE and I expect that the flash-programmer is so intelligent that it erases only the necessary parts of the flash.... if not, probably I can use the "Program a file into flash" feature to store the software for the second Nios.
But until now I just tried to get the first Nios project to run.... and failed. The only interaction between the both CPUs is the flash during booting and a fifo in-between for data transfers from one to the other. What I started today is porting the design to a StratixII eval board, there I can run the whole design with 75 MHz and must not care about the multi clock feature. Sure this will not solve the booting issue (if it is one)...
