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Altera_Forum's avatar
Altera_Forum
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21 years ago

Multiple-Clock Domain with 2 Nios?

Hello, I tried the new multiple-clock domain feature (Quartus 4.2, Nios1.1) with a Cyclone evaluation board. One Nios should boot from flash and run out of SDRAM, the other Nios should also b...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

I haven't seen those error message before, but re-reading your original post has made me curious. You say that both processors boot out of Flash. That would mean that each needs a bootloader (I don't think you will get two of them). Can you copy and paste the text from the flash programmer into the post. I'll take a look and see what's going on.

Back to that error message. Do you have a signal in your system that is usually a bus, but has been minimized to a single line? I have never tried to declare a std_logic_vector (0 downto 0) before but I thought that would be a perfectly valid statement (valid, but not clean coding). If I don&#39;t get back to you right away send another message since I happen to be working with the clock crossing features right now (before the weekend roles around and I start forgetting things http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif ).