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Altera_Forum's avatar
Altera_Forum
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15 years ago

multicycle instruction FSM with nios and the done variable

I have been trying for weeks to figure out how the done variable works and it seems like it has no effect whatsoever on the program. Can anyone explain how it works. Here's an example i've bee...
Altera_Forum's avatar
Altera_Forum
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15 years ago

But the Nios II custom instruction master will only assert 'start' for one clock cycle. You pasted an image from component editor that shows this so if you attempt to simulate with the start signal asserted for longer than that you are not even mimicking what the processor will drive into the custom instruction which seems like a waste of time to do.

For more details: http://www.altera.com/literature/ug/ug_nios2_custom_instruction.pdf

Page 12-13 describe the timing of a multicycle custom instruction.