Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

mSGDMA ST-MM to SDRAM - Issue

Hey guys.

I'm performing a design which contains a mSGDMA conected to a SoC SDRAM port.

I could get it to write data onto the SDRAM by using a Modular SGMDA Dispatcher and a Write Master (two different IPs), although when I tried to write a greater length than 0xF into the descriptor the core would stuck in busy mode and wouldn't perform any transfer to the SDRAM. Let's say, if I try to write 0xDEADBEEFDEADBEEF (8 bytes) to the SDRAM address 0x30000000 I'm able only by setting the descriptor length to 0xF, otherwise it won't work (and with the length of 0xF the SDRAM receives 16 bytes). Theoretically if I put 0xFFFFFFFF in the length field it will perfom a write of 0xFFFFFFFF bytes? This means that one descriptor is capable of sending that amount of data to the SDRAM?

What I'm trying to do is to send streaming data to the mSGDMA so the data can be written into an address range from SDRAM (let's say 0x3000 0000 - 0x3fff ffff). Do I need to use multiple descriptors to perform this or I'm able to use only one descriptor and reissue it (the Park Writes in the Control Bit Field Definition) and also the 'End on EOP' bit field? I am asking this cause I couldn't perform multiple writes onto the SDRAM and I have to keep writing a new descriptor everytime. Also, I keep track the Write fill level from the CSR Register and it is stuck at one. This means that Write Master FIFO isn't getting filled?

12 Replies