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MichaelV's avatar
MichaelV
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5 years ago

mSGDMA signal undeclared

Hello,

I'm a newbie to Platform Designer and NIOS2 and I am trying to add ethernet using the Triple Speed Ethernet IP and mSGDMA with the iNicheStack.

Using platform Designer generation of HDL is successful and add the iNicheStack using tcl-script.

The whole build process is started using make-files including the generation of the NIOS BSP files.

Unfortunately when software is compiled I get the following errors:

alt_sys_init.c:135:37: error: 'msgdma_rx' undeclared (first use in this function)

ALTERA_MSGDMA_INIT ( MSGDMA_RX, msgdma_rx);

alt_sys_init.c:136:37: error: 'msgdma_tx' undeclared (first use in this function)

ALTERA_MSGDMA_INIT ( MSGDMA_TX, msgdma_tx);

In another post (NIOS2-mSGDMA-Ethernet-example ) I read it might be related to the BSP settings.

Any help or thoughts would be appreciated.

7 Replies

    • MichaelV's avatar
      MichaelV
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      5 years ago

      Hello,

      I think it has something to do with missing definition for ALTERA_MSGDMA_INSTANCE in altera_msgdma.h.

      What can I change to get tools to generate files containing definition.

  • SyafieqS's avatar
    SyafieqS
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    5 years ago

    Hi Michael,


    For hardware design what if you try to recompile from scratch? (clean project), and for software rebuild and recompile as well. Let me know if issue still persist.


    • MichaelV's avatar
      MichaelV
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      5 years ago

      Hello,

      Thank you for your time but recompiling and building does not resolve the issue.

      Since I was converting an SGDMA-implementation to using mSGDMA I did not connect all signals (interface is a bit different)

      I finally resolved the issue by connecting an unconnected signal in Platform Designer.

      Apparently some signals have to be connected, while some can remain unconnected.

      • venkatasateesh's avatar
        venkatasateesh
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        4 years ago

        Hi MichaelV Sir,

        i am also working with tri speed ethernet like you ,i also upgraded from SGDMA-implementation to using mSGDMA.but ,i am getting some issue like you .could you share me connection image of your qsys platform designer with with mSGDMA and tse ip to resolve issue. i have structed with issue from couple of days

        i am working on

        Fpga Series :CYCLONE IV E FPGA ,

        tool version :Quartus prime lite 20.1version

        here i am sharing my qsys &eclipse error

        i am looking forward for your great support

        Thanks&Regards

        Sateesh

  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    5 years ago

    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.



  • Michael_vdV's avatar
    Michael_vdV
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    4 years ago

    Hello Sateesh,

    It's been a while, so I'm not exactly sure what I changed. But as I mentioned above a connected an unconnected signal.

    In your images a noticed that the descriptor_slave is not connected. Try connecting it to S1 of the descriptor memory.

    (See my attached images)