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MichaelV's avatar
MichaelV
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5 years ago

mSGDMA signal undeclared

Hello, I'm a newbie to Platform Designer and NIOS2 and I am trying to add ethernet using the Triple Speed Ethernet IP and mSGDMA with the iNicheStack. Using platform Designer generation of HDL is...
MichaelV's avatar
MichaelV
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5 years ago

Hello,

Thank you for your time but recompiling and building does not resolve the issue.

Since I was converting an SGDMA-implementation to using mSGDMA I did not connect all signals (interface is a bit different)

I finally resolved the issue by connecting an unconnected signal in Platform Designer.

Apparently some signals have to be connected, while some can remain unconnected.

venkatasateesh's avatar
venkatasateesh
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4 years ago

Hi MichaelV Sir,

i am also working with tri speed ethernet like you ,i also upgraded from SGDMA-implementation to using mSGDMA.but ,i am getting some issue like you .could you share me connection image of your qsys platform designer with with mSGDMA and tse ip to resolve issue. i have structed with issue from couple of days

i am working on

Fpga Series :CYCLONE IV E FPGA ,

tool version :Quartus prime lite 20.1version

here i am sharing my qsys &eclipse error

i am looking forward for your great support

Thanks&Regards

Sateesh