Forum Discussion
Altera_Forum
Honored Contributor
12 years agomSGDMA DDR3 errors in data saved after X bytes
I have Qsys system consisting of NIOS (+ associated peripherals), mSGDMA dispatcher, mSGDMA write master and custom block with avalon stream output. Dispatcher settings: Streaming to Mem...
Altera_Forum
Honored Contributor
12 years agoI've been looking into possible issues with the data cache but I haven't been able to find a solution. I tried increasing the data cache to 64kb from 4kb (I'm using a NIOS II/f core) but it didnt have any affect. I also wondered if I needed to flush the data cache after writing a descriptor using alt_dcache_flush_all(), but again to no affect.
It might be worth mentioning that the errors in the data are different every time I run but they do occur at very similar (but not equal) addresses. Invariably the first 4kb of data (1024 words) are correct. So I wonder if my issue is to do with the write master FIFO which is 4096 bytes deep. Though the first error does tend to be 1275 words in so that is confusing me. Again, any further advice appreciated. edit:spelling