Forum Discussion
Altera_Forum
Honored Contributor
19 years agoMore EPCS troubles
Hello everybody, I ran into a problem trying to let my custom board run stand-alone. I have a EPCS1 and a CFI Flash connected to my design. I would like to store mt config data and my softw...
Altera_Forum
Honored Contributor
19 years agoI tried the Mem_test application. But I don't have enough space on my FPGA to run it. It a Cyclone EP1C3. It is supposed to boot only the two other Fpga's on the board. Actually there is just a onchip mem (4K),epcs controller, tri state bridge,cfi-flash, jtag uart and a few leds. this takes almost 75% of the resources I have on the EP1C3. When I build the mem-test i need to have
/cygdrive/c/altera/kits/nios2_51/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.1/../../../../nios2-elf/bin/ld: region onchip_memory_0 is full (memtest_1.elf section .text). Region needs to be 77612 bytes larger. I just don't have this kind of space left. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif I'll check my schematics once more to see if everything I wired up is done correctly Thanks for the help so far Slacker --- Quote Start --- originally posted by slacker@Oct 19 2006, 07:25 PM have you tried running the memory test application (one of the standard software "templates") on your flash device? you can step through your flash initialization to see what's actually failing. in order to do this, you'll need to start by setting a breakpoint, just prior to your cfi flash device's initialization in alt_sys_init.c (in your syslib project).
additionally, my guess is that you don't have the device wired up properly. the debug output, that you're receiving, doesn't make much sense and is suspiciously repetitive. in any case, you'll be able to see what happens, in more detail, when you step through the cfi initialization.
oh, and welcome to the wonderful world of cfi inconsistencies. :-)
cheers,
- slacker
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