Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorMetaStability
How long is the duration of metastability in a flipflop? If metastability occurs in one cycle i.e. data edge coincides with clock edge and in the next cycle data is stable at the clock edge, will the...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- No, it should go stable again. If there is a risk of meta stable values in your system (other than synchronisers) you have a problem with your design. --- Quote End --- The data signal is generated at 122.88 MHz and sampled at 153.76 MHz via two synchronizers. Is it required to pulse stretch the data signal? The sampling clock is faster than the data signal.
