Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Memory verification issue

Hi all,

I have ran into a problem when running Simple Socket Server.

When i am trying to run the program (from on-chip ram memory ) i get the verify failed message :

"

Verifying 00600020 ( 0%)

Verify failed between address 0x600020 and 0x60FFFF

Leaving target processor paused" on nios II console.

I am using Arria II gx (ep2agx260ff36i5n) device and a custom board.The address range in which verification has failed is on chip ram address area.I have tried to run the program from external SSRAM and got the same error,and i have switched to on-chip ram memory in order to isolate the problem. It is important to notice that i am able to run simple programs (such as memory test ,hello world ,blinking leds) either on external SSRAM or on-chip memory without any problems.Any help would be appresciated

Thank You,

Michael.

12 Replies

Show More
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    What warnings do you get? What are the top failing paths and what's their slack?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Thanks for the help,got this thing resolved,by a fluke.Here is how i got to the fluke:i have tried to run the example design of arria II development board,6g edition.By the way,you ALWAYS get constraint warnings,at least on development board examples,even if you don't change the example by any way).It worked.Then i have looked carefully at sopc connections of the design example (bts_config).I have noticed that descriptor outputs of both sg-dma are connected to descriptor memory,but the memory i/o are connected both to onchip-ram memory and to ssram memory (through tri-state bridge).In my SG-DMA example based design i have instansciated an on chip ram and did the same,and it worked!Then i removed the onchip ram set the reset vector and exception vectors to external ssram and it still worked!Haleluya.... :)

    I have no idea why does this thing work,but i am glad anyway :)