memory map for SDRAM or ON_CHIP_RAM

You subdivide your memory if you wish to do so in your software by design (Or the RTOS if present may do this). There are no boundaries to worry about in any of the main memories. With that said if you use a Nios Development board or use a flash dependent software template (like web_server) you do have to worry about how the flash is divided up since it has the following regions:

User Software

Factory Software

User Hardware

Factory Software

Slack space (stores the MAC address, webpages, etc...)

These regions vary depending on the board so I would look at the web server software example and the documentation for your specific board.

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why is the reset address is always targeted towards the external flash does this has anything to do with the configuration file (sof) being loaded into the flash?[/b]

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I take it you are referring to the hardware reference designs shipped with Nios II. The reason why it targets flash at reset is so that if you program your software into flash (using the flash programmer) you will have a bootloader present as well (this is automated for you) that will copy the contents for whatever memory you targetted in the compilation of your software. So you don&#39;t have to use the flash base address as your reset address is what I&#39;m getting at but it was set to Flash in the hardware reference designs with flash programming in mind.

To answer the rest of your questions I think this document will help:

http://www.altera.com/literature/ug/ug_nio..._programmer.pdf (http://www.altera.com/literature/ug/ug_nios2_flash_programmer.pdf)