Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

lpm_counter - connect sclr to reset

Hi,

I've been looking at examples with lpm_counters but haven't found what I need exactly. I need to connect the sclr to some sort of reset. Would creating a pio suffice for this by writing 0x00 and then 0x01 or would I have timing issues going this approach. It seems like I may have issues with the system clock signal not matching a correct reset signal taking this approach.

Any help is appreciated.

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    I fear you didn't even begin to explain your problem.

    Why do you need a synchronous reset? What's the reset source, how is it related to system clock?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    Thanks for the reply. I might not need sclr. Basically, I have a DFF along with other logic gates connected to this counter but I'm not receiving the correct number of counts I'm expecting and the number stays at '2'. Right now I have clock, cnt_en, and q[31..0] for my counter. I originally had sclr as well but I'm getting the same results with and without it. I'm not sure where the error is but I do believe the logic gates connected to the counter are correct and the error isn't there. Maybe I'm not fully understanding the counter.

    Any guidance is appreciated.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    I do need an sclr so that when the logic is low sclr resets count and that way I'm not getting an incorrect counter at the end. But I'm still having issues with the input going into sclr. I believe that is why my counter isn't functioning properly. Am I still misunderstanding the functionality of the counter?

    Again any help is appreciated.