LPDDR4 not available in NIOSV/g linker script - Agilex-5, Quartus 26.1 Pro

Hello, I have a simple design for Agilex 5, using NIOS V/g and EMIF IP with LPDDR4 memory. I have the NIOS V instruction and data manager ports connected to the EMIF IP. Design compiles Ok. But...