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Honored Contributor
Honored ContributorLong Boot Time after update to 5.0
after updating to Quartus / NIOS II 5.0 my design needs about 7 seconds to boot (reboot) from EPCS. With an oscilloscope I've measured, that the FPGA configuration is done in 80 msec. After a sho...
Altera_ForumHonored Contributor
Honored ContributorHi Scott,
Do you mean Nios II 5.0 SP1? (Just released)? Yes, this was fixed in that release. The fix is in the EPCS peripheral, relevant flash programming files, and all example designs, so that if people make a new design or copy from an example all should be well. However, my bet is that you are re-generating an existing design and this is a problem of a stale .ptf file. I would reccomend opening your design in SOPC Builder, deleting and then re-adding the EPCS peripheral, and re-generate/re-compile in quartus. This should clear everything up. My apologies for not making this clear.
