Honored Contributor
Honored Contributoredit: the instructions below have been edited to account for the issue "mir" mentioned in the post below this one!
We now have a workaround to this issue -- a permanent fix will be included in the next Nios II release: 1. Close any open instances of SOPC Builder 2. Open the file altera/kits/nios2/components/altera_avalon_epcs_flash_controller/em_epcs.pm and make the following change to line 323: Change this line: extradelay = "1"; --to-- extradelay = "0"; After performing this modification save & close the file. 3. Open the file altera/kits/nios2/components/altera_avalon_epcs_flash_controller/class.ptf and make the same change change to line 83 (extradelay = "1" should be changed to extradelay = "0"). After performing this modification save & close the file. 4. Re-open SOPC Builder for any systems where you wish to use the EPCS controller 5. Delete the EPCS controller from your design 6. Add a new EPCS controller (from the 'memory' group of IP) 7. Re-generate the system in SOPC Builder 8. Re-compile the affected design in Quartus. OPTIONAL: The same fix can be used to speed-up flash programming times in board components that are used to program EPCS devices, or to speed up access to designs that use the (legacy) ASMI peripheral. To address this issue, open the class.ptf & em_asmi.pm files in the folder altera/kits/nios2/components/altera_avalon_asmi folder and repeat the changes described above (class.ptf line 74 & em_asmi.pm line 68). Again, designs that use ASMI should be opened in SOPC Builder, the ASMI peripheral deleted, added back again, and re-generated/re-compiled. Background: the 'extradelay' parameter is useful for interfacing to certain SPI devices such as ADCs that require delay between SPI chipselect assertion and clocking. However, its inclusion for the EPCS Flash controller was erroneous.
