hi everyone! i am new to altra and nios II, recently i am trying to study altra fpga and nios II, i meet some problems and i need some help in my project, i want to use nios II and try to use jtag-uart. i insert a sdram-controller so i can download the code to it. and i make some Constraint to make the sdram work correctly. i just want to print "Hello from Nios II! %d\n", timer my C program is as follows: # include "alt_types.h"# include "altera_avalon_pio_regs.h"# include "sys/alt_irq.h"# include "system.h"# include <stdio.h># include <unistd.h> void delay(void); int main(void) { alt_u8 timer = 0; printf("Hello from Nios II! %d\n", timer); delay(); timer++; printf("Hello from Nios II! %d\n", timer); while(1) { printf("Hello NIOS II!\n"); delay(); timer++; } return 0; } void delay(void) { alt_u32 i=0; while(i < 4000000) { i++; } } but the result turn out to be very stange, the NIOS II Console shows: Hello from Nios II! (this is also wrong because the timer is missing) eell rrmmNNoo II eell IISSII!! HllooNNOO II! eell IISSII!! i want to upload my project, but it is too big, so i just upload the bsp setting file(i change it to txt) thanks!

I guess you are flooding jtag-uart with data and the buffer overflows. The printf calls are likely to occur at very high rate, more faster than the jtag-uart driver can process them. Infact your delay() implementation will not ensure a predictable delay: it depends from how the while loop gets compiled; it could even be removed by the optimizer, since it has no effects. A possible shortcut to make this code work could be define variable i as 'volatile' and use it as a return value of the delay() function. Anyway this is not a recommended practice: you should rely on a hw timer.

My guess is also that the while loop is being optimized away if any optimization at all is used when building.

hi thanks for the help. in fact this is the same project i have done in on-chip memory, and it works correctly, then i redo the project use sdram. in the on-chip memory project, in order to reduce the code size, i do the following changes in the bsp: http://www.alteraforum.com/forum/attachment.php?attachmentid=9378&stc=1 when i redo the project using sdram, i did not make the changes in the up figure, since the sdram is big enough. then the jtag output in correctly... when i run debug, i can see the delay() works. and i think it does not make sense that "it could even be removed by the optimizer, since it has no effects", the delay() do have its meaning in the code. i have upload the bsp setting file, so can you find if there are something wrong?

--- Quote Start --- in fact this is the same project i have done in on-chip memory, and it works correctly, then i redo the project use sdram. in the on-chip memory project, in order to reduce the code size, i do the following changes in the bsp: ... when i redo the project using sdram, i did not make the changes in the up figure, since the sdram is big enough. then the jtag output in correctly... when i run debug, i can see the delay() works. --- Quote End --- It is not clear whether your project works either with the onchip-ram configuration or with the sdram one, or neither. Or maybe does it work in debug mode but not in Run? Please explain better. --- Quote Start --- and i think it does not make sense that "it could even be removed by the optimizer, since it has no effects", the delay() do have its meaning in the code. i have upload the bsp setting file, so can you find if there are something wrong? --- Quote End --- It does make sense. From the compiler point of view that delay-while loop indeed doesn't have any meaning since it have absolutely no influence on the code flow and variables or, in general, on code outputs. Whenever the output complies with the source code, the compiler is quite free to generate the code which better implements it (faster, less size, less resources...) thus removing anything it deems useless.

jtag-uart output incorrectly | Altera Community

9 Replies

Altera_Forum
Honored Contributor
11 years ago
I guess you are flooding jtag-uart with data and the buffer overflows.
The printf calls are likely to occur at very high rate, more faster than the jtag-uart driver can process them.
Infact your delay() implementation will not ensure a predictable delay: it depends from how the while loop gets compiled; it could even be removed by the optimizer, since it has no effects.
A possible shortcut to make this code work could be define variable i as 'volatile' and use it as a return value of the delay() function.
Anyway this is not a recommended practice: you should rely on a hw timer.
Altera_Forum
Honored Contributor
11 years ago
My guess is also that the while loop is being optimized away if any optimization at all is used when building.
Altera_Forum
Honored Contributor
11 years ago
hi thanks for the help.
in fact this is the same project i have done in on-chip memory, and it works correctly, then i redo the project use sdram.
in the on-chip memory project, in order to reduce the code size, i do the following changes in the bsp:
http://www.alteraforum.com/forum/attachment.php?attachmentid=9378&stc=1

when i redo the project using sdram, i did not make the changes in the up figure, since the sdram is big enough.
then the jtag output in correctly...

when i run debug, i can see the delay() works.
and i think it does not make sense that "it could even be removed by the optimizer, since it has no effects", the delay() do have its meaning in the code.
i have upload the bsp setting file, so can you find if there are something wrong?
Altera_Forum
Honored Contributor
11 years ago
keep asking for help!
Altera_Forum
Honored Contributor
11 years ago
--- Quote Start ---

in fact this is the same project i have done in on-chip memory, and it works correctly, then i redo the project use sdram.
in the on-chip memory project, in order to reduce the code size, i do the following changes in the bsp:
...
when i redo the project using sdram, i did not make the changes in the up figure, since the sdram is big enough.
then the jtag output in correctly...
when i run debug, i can see the delay() works.

--- Quote End ---

It is not clear whether your project works either with the onchip-ram configuration or with the sdram one, or neither.
Or maybe does it work in debug mode but not in Run?
Please explain better.

--- Quote Start ---

and i think it does not make sense that "it could even be removed by the optimizer, since it has no effects", the delay() do have its meaning in the code.
i have upload the bsp setting file, so can you find if there are something wrong?
--- Quote End ---

It does make sense. From the compiler point of view that delay-while loop indeed doesn't have any meaning since it have absolutely no influence on the code flow and variables or, in general, on code outputs.
Whenever the output complies with the source code, the compiler is quite free to generate the code which better implements it (faster, less size, less resources...) thus removing anything it deems useless.
Altera_Forum
Honored Contributor
11 years ago
--- Quote Start ---
It is not clear whether your project works either with the onchip-ram configuration or with the sdram one, or neither.
Or maybe does it work in debug mode but not in Run?
Please explain better.

It does make sense. From the compiler point of view that delay-while loop indeed doesn't have any meaning since it have absolutely no influence on the code flow and variables or, in general, on code outputs.
Whenever the output complies with the source code, the compiler is quite free to generate the code which better implements it (faster, less size, less resources...) thus removing anything it deems useless.
--- Quote End ---

Hi Cris72, thanks for the help!
1. when use onchip-ram, i change the bsp setting according to the figure above to reduce the code size
the project works correctly, both the debug mode and run. and i think the delay() also works because: 1). there are obvious time interval between the "Hello from Nios II! ..." 2). when in debug mode, i can go into the delay() function.

2.when use sdram, i do not change the bsp setting since the sdram is big enough
1).when the project is in run, the jtag-uart output incorrectly, like what i said above
2).when the project is in debug,the jtag-uart output still incorrectly, just like the run mode, even if set a breakpoint between every printf(); and i still can step into the delay();

3. about the delay(), what happens if i use usleep()? will the usleep() be removed by the optimizer?
Altera_Forum
Honored Contributor
11 years ago
First of all make sure you don't have any timing problem with sdram. Anyway I don't think so, otherwise you'd have more severe problems, like code hangs or errors during code download.
The bsp setting surely changes the way code is compiled. In particular, if I remember correctly, the small C library uses a different implementation of printf (and in general of I/O functions) which have different execution speeds and use different resources. I think the small C lib version is also not thread safe.

usleep() is generally far better than the while loop, since it's defined in such a way it isn't affected by compilation. Moreover, if the system can rely on a hardware timer, the usleep() delay is quite accurate.
Altera_Forum
Honored Contributor
11 years ago
--- Quote Start ---
First of all make sure you don't have any timing problem with sdram. Anyway I don't think so, otherwise you'd have more severe problems, like code hangs or errors during code download.
The bsp setting surely changes the way code is compiled. In particular, if I remember correctly, the small C library uses a different implementation of printf (and in general of I/O functions) which have different execution speeds and use different resources. I think the small C lib version is also not thread safe.

usleep() is generally far better than the while loop, since it's defined in such a way it isn't affected by compilation. Moreover, if the system can rely on a hardware timer, the usleep() delay is quite accurate.
--- Quote End ---

since the project run correct when use onchip memory and use bsp settings in the Table 2-1 above.
i think the bsp settings differences may be the reason why the sdram version works incorrect.
so i change the bsp setting in the figure above one by one. (in the sdram version, firstly i leave the bsp settings in default)
after i change the "small C library" from "false" to "true" and i change the "reduce device drivers" from "false" to "true";
then i made a little change in the code:
int main(void)
{
alt_u8 timer = 0;
while(1)
{
printf("Hello from Nios II! %d\n", timer);
delay();
timer++;
}
return 0;
}

so the jtag-uart output becomes:

Hello from Nios II! 0
Hello from Nios II! 1
Hello from Nios II! 2
Hello from Nios II! 3
Hello from Nios II! 4
Hello from Nios II! 5
Hello from Nios II! 6
Hello from Nios II! 7
Hello from Nios II! 8
Hello from Nios II! 9
Hello from Nios II! 11 (this is wrong because the number should be 10)
Hello from Nios II! 11 (this is wrong because the number should be 11)
Hello from Nios II! 11 (this is wrong because the number should be 12)
Hello from Nios II! 11 (this is wrong because the number should be 13)
Hello from Nios II! 11 (this is wrong because the number should be 14)
Hello from Nios II! 11 (this is wrong because the number should be 15)

i have some questions:
1. why this happens?
2. what bsp setting should i make to make sure the project works correctly?
3. can you up load a bsp setting file you usually use ?
thank you very much!
Altera_Forum
Honored Contributor
11 years ago
the jtag-uart output in the sdram project still wrong even i use the same bsp setting as the onchip memory project!
i even compare the settings.bsp files in both project, they are all same except one use on chip memory and one use sdram....
with the same c code:
int main(void)
{
alt_u8 timer = 0;
while(1)
{
printf("Hello from Nios II! %d\n", timer);
delay();
timer++;
}
return 0;
}

the sdram project output:
Hello from Nios II! 0
Hello from Nios II! 1
Hello from Nios II! 2
Hello from Nios II! 3
Hello from Nios II! 4
Hello from Nios II! 5
Hello from Nios II! 6
Hello from Nios II! 7
Hello from Nios II! 8
Hello from Nios II! 9
Hello from Nios II! 11 (this is wrong because the number should be 10)
Hello from Nios II! 11 (this is wrong because the number should be 10)
Hello from Nios II! 11 (this is wrong because the number should be 10)
Hello from Nios II! 11 (this is wrong because the number should be 10)
Hello from Nios II! 11 (this is wrong because the number should be 10)

the onchip memory project:
Hello from Nios II! 0
Hello from Nios II! 1
Hello from Nios II! 2
Hello from Nios II! 3
Hello from Nios II! 4
Hello from Nios II! 5
Hello from Nios II! 6
Hello from Nios II! 7
Hello from Nios II! 8
Hello from Nios II! 9
Hello from Nios II! 10
Hello from Nios II! 11
Hello from Nios II! 12

it makes me so confuse....

i up load my settting.bsp file, and ask for someone upload their settting.bsp file, thank you!
settings.zip7 KB

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jtag-uart output incorrectly

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