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Honored Contributor
Honored ContributorJPEG core with NiosII
Hi Every body i am working on project : JPEG core on FPGA Probably i will use NiosII development kit with STRATIX board and i will iterface the JPEG core with the NiosII as a new component so i...
Altera_ForumHonored Contributor
Honored ContributorThank you again. Just because today is Friday i hope you could answer my next question before week end.
As me,you probably had a look to Portable Reference Platform Project in a NiosII forum section. There,it is used a Camera block and a DMA for Camera.Well, both are descripted in vhdl language,but DMA vhdl's it's understandable for me.If you could,say me what do you think of that Anyway this is my question.I'd like to know if you are agree with me: 1) I must describe my camera in vhdl(structural and functional) for having it available on SOPC builder.Then in Quartus i will do the connection in order to where is placed my camera; 2)Could i use the DMA already present in SOPC for camera data flows?If not,dma vhdl description it's the only way? Thank you Paolo
