Forum Discussion
Altera_Forum
Honored Contributor
20 years agoIs using a single 25MHz oscillator feasible
We're starting to design a custom board using a Stratix II part and we'd like the board to be as small as possible. The board will have an ethernet device, SRAM, CFI flash, and the MAX progra...
Altera_Forum
Honored Contributor
20 years agoThe only potential issue I have had was deriving the right frequencies; that's why I usually have two slots, one for a 50M and one for a 48M... they can get you different time bases. If you can get all of your frqeuencies with the one, then you should be ok. The only case I could see forming a problem was if you needed multiple output clocks from the FPGA; you would ideally use the outputs of a PLL for these clocks, and theres only one external output per pll... so keep that in mind too