New ContributorI build a QSYS of NIOS II and RSU, but when NIOS re-write registers of RSU, FPGA cannot change images. SO if there is an example design?
ModeratorHi @LZhao1,
Thank you for posting in Intel community forum and hope you are doing well. Regarding the question that you have on the references design for RSU, you may refer to the link below:
Please do let us know if there is any clarification that we can help with.
Warm Regards.
ModeratorHi @LZhao1,
Hope this message find you well and good day, as we do not receive any response from you to the previous clarification that we have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.
Warm Regards
New ContributorHi,
With your help, we have solved the problem, thanks a lot!
