Forum Discussion
Altera_Forum
Honored Contributor
Honored Contributoris signed type definition synthesizable?
Hi all, I'm designing a simple divider as shown below: module divider (in1, in2, division, multiply); //parameter parameter DATA_WIDTH = 32; //Input input signed [DATA_WIDTH-...
Altera_ForumHonored Contributor
Honored ContributorYes it is synthesizable.
But it builds combinatorial logic (slow). This is due to the assign, and not due to the signed types. You should register it and pipeline it, to make it faster.
