Is Nios2 fully static processor?

It kind of depends on the peripherals. The Nios2 core itself, and the Altera logic, can go down to DC. But several peripherals can't go down to DC. Some examples I can think of:[list][*]Any JTAG peripheral (see above re: 25 MHz clock minimum, also some things like Nios2 flash programmer need at least a 50 MHz clock)

[*] SDRAM (stop clock and it won't get refreshed)

[*] Ethernet (usually has its own clock, though)

[/list]The Nios2 IDE debugger doesn't stop the clock, and probably won't like it if you do, however it has its own way of stopping the processor.