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Altera_Forum's avatar
Altera_Forum
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21 years ago

IRQ handler problem

Hi all, I have build an application on Stratix II, with three CPU's. I have ONE (!) pio line connected to the system of three CPU's. In the SOPC builder I connected the three CPU&#39...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

I'm afraid I don't see how having more PIO helps.

You need to think about how you wish the interrupt to be cleared, do you want the IRQ to interrupt all 3 processors and remain asserted until they have all seen it, or do you just want it to be cleared when one of them has processed it. The hardware and software will be completely different depending on what you're trying to do.