Forum Discussion
Altera_Forum
Honored Contributor
16 years agoIORD IOWR macros vs. memory access to peripherals
What is the point of the IORD and IOWR macros? I can access my custom Avalon peripherals using them, but it seems like I can't access them like the following: volatile alt_u32 *DEV_PTR = DEV_...
Altera_Forum
Honored Contributor
16 years agoTo add to the list don't mix cached and non-cached accesses. For example don't do something like this:
int * my_ptr = malloc (1024); for(i = 0; i < 1024; i+=4) IOWR_32DIRECT(*my_ptr, i, i); The reason why this is bad is that the memory returned from malloc came from the heap and you have no clue if it is cached or not. As a result if any of those IOWR accesses overlap a cached memory location you'll find that the cached value will be written out instead of the 'i' variable. Instead you should either flush the cache before the for loop or use the uncached macros since they'll perform the flush before performing cache bypass accesses.