Forum Discussion
Altera_Forum
Honored Contributor
16 years agoIORD IOWR macros vs. memory access to peripherals
What is the point of the IORD and IOWR macros? I can access my custom Avalon peripherals using them, but it seems like I can't access them like the following: volatile alt_u32 *DEV_PTR = DEV_...
Altera_Forum
Honored Contributor
16 years agoVolatile doesn't instruct the compiler to avoid the cache. It prevents the compiler from optimizing read/writes to the variable, ensuring that all read/write operations are indeed done by the compiled code. But it will still use the cache.
The only ways to bypass the cache are the IORD/IOWR macros, and to map the accessed memory in uncached areas using alt_remap_uncached(), or the special uncached malloc functions. Edit: Sorry BillA, this is in fact exactly what you said... I should definitely NOT answer anything before my morning coffee...