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Altera_Forum
Honored Contributor
11 years agoIORD and IOWR issues
Hello there, I am struggling to understand a simple write and read with the nios processor. With qsys, I have setup a simple testcase where a nios (e) with no cache and a PIO are connected...
Altera_Forum
Honored Contributor
11 years agoIf data_out has the original 6bit data width, you should write
data_out <= {writedata[4:0],1'b1}; otherwise I think the compiler discards the added bit.