interrupt generation

I OR all of the pointers to my Avalon HW blocks with the data cache bypass bit so I don't get this kind of behavior. Hopefully it will avoid me this problem.

# define DATA_CACHE_BYPASS_BIT 0x80000000

volatile alt_u32* avalon_component_p = (volatile alt_u32*)(AVALON_COMP_BASE|DATA_CACHE_BYPASS_BIT);

This is how I define all of my hw pointers in my C code.

if you have no idea what I'm talking about google up data cache bypass niosII and read their document. I'm still not clear why volatile isn't sufficient but nios provides you with the ability to make the 31st bit '1' in order to force data cache bypassing.

:)