interrupt generation

there is one catch...

you have to clear the irq-flag manually.

But if you try to write via pointer on a peripheral module at the END of an interrupt subroutine (=last instruction) and have DATA CACHE enabled (standard, if using NIOS2/f), the data cache will be flushed and the write aborted.

// regular isr
static void test_isr(void* context, alt_u32 id) 
 {
    ...
 
  // RESET INTERRUPT at the end of an interrupt
  (*(long*)PERIPHERAL_BASE) = 0;
  }

So better use

IOWR(PERIPHERAL_BASE, 0, 0);

instead, to bypass the data cache.

or use the

alt_dcache_flush_all();

statement (# include <sys/alt_cache.h> ).

it took me some time to figure out, why the interrupt flag wasn't cleared if the pointer insturction was the last one, but was cleared if there was an another one after it :D