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Altera_Forum
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19 years ago

Internal Registers in Custom Instructions

What I'm actually trying to see is this: There is a custom instruction block with an internal register bank, which (lets say) has a cryptographic table. If the CI were to be used many times in an application, would it provide an edge (in terms of power considerations) over another custom instruction that uses a Cryptographic Lookup table stored in the memory?

I reasoned out that there would be less power disspiation because access to a smaller, tagless memory should ideally save considerable energy and there should be a speedup. But there was not much speedup (infact Fmax decreased due to the MUX delay introduced when a register bank is declared inside a CI). But I am not able to verify the power consideration.

The results of the analysis vary over wide ranges, and from them it seems that the internal register access actually consumes more power than memory access!!!! (contrary to what I could reason out).. However, the confidence level of the PowerPlay power analyzer is low (i.e it says that the user provided insufficient toggle rate data) and hence, from this I understand, I cannot rely on it completely.

Are you able to come up with any logical inferences/explanations as to why the power power dissipation must be less than or greater than when compared to each other?

Thank you in advance for any help you may be able to provide..

Cheers.

Sai
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