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Altera_Forum
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21 years ago

Interface to User Logic

I am building a Nios2 system that has custom RAM/FLASH. I am trying to use the Interface to User Logic using an 8 bit data bus (inout), 15 address bits, nRD, nWR, and 2 nChipselects. How in tarnati...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

The chip select address is specified in the main "System Contents" screen of SOPC Builder under the 'Base' column. The reset address for the processor is specified in the 'More "cpu" settings' window.

If you need to decode 2 chip selects, just make your address bus 1 bit wider and use the upper address bit to decode the single chip select out of the nios into 2 separate chip selects for your memory.

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Terry