instruction master address range only 256Mbyte ?

Hello Michael,

During a read or write access only the address bits 0 to 30 will be decoded. Bit 31 is used as a flag for using the data cache (0) or not using (1) it. So you only can address a space of 2 GByte. The behaviour is like mapping the addresses from 0x80000000 to 0x00000000. I think if you setup up a component to an address over 0x7FFFFFFF you will never reach it. If you want to access your own component without data cache then setup up the address of the component for e.g. to 0x10000000 and access it with 0x90000000.

Sorry I don’t know something about the 256 MByte boundary.

Regards,

niosIIuser