Honored Contributor
Honored ContributorHi Daixiwen,
I didn't change anything in the bsp settings. In the linker script tab i have : - .bss, .exceptions, .heap, .rodata, rwdata, .stack, .text linked in ssram - .entry linked to reset in epcs_flash_controller The epcs_flash_controller is connected to instruction_master and data_master. I flash the .jic file by jtag and the harware image successfully boot on power up but not the Nios. Maybe the bootloader (in flash @reset_vector addr) can't be found ? Is there an offset for the bootloader (which implies an offset for the nios reset_vector) ? Is it correct to linked vector_reset into epcs instead of system ram ? thx
