IDE controller on NiosII

Hi,

Im trying to design an IDE controller on the Nios II Stratix Professional Edition board. I have got the vhdl code for it from opencores.org, but now i am having problems implementing it.

So far i have used interface to user logic to add the vhdl code, and i have used a cpu, sram, cfi_flash , tri state bridge and a jtag_uart , and i have made the pin assignments. is this correct? I assume that the IDE driver that runs the compact flash can be used for this IDE connection as well.

When i connect a hard drive to the IDE pins, it is not detected. Is this a problem with my implementation or is it wrong to use the IDE driver that is used to run the compact flash.

thanks

Deepti