Honored ContributorI want the Nios cpu running at 200MHz. so I have to let the SDRAM alse running at 200MHz.
but no matter what Phase I set in the PLL. It can not work. If you guys successfully do this . please tell me . THKs :'( Is it possible that Nios 200MHz, SDRAM 100MHz ??
Honored ContributorI already successfuly run my custom board at CPU 150MHz, SDRAM 150MHz with the PLL paremeter Ratio 3/1, Ph -65 degrees ~~ -190 degrees.
Honored ContributorEven with a fast Stratix it will be very tricky to run a NIOS CPU at 200MHz. you can try and identify the slow paths in Timequest to add pipelining at the correct places in your SOPC design.
Honored ContributorAlso keep in mind if you plan on placing your code in that same SDRAM by running them on different clock domains you are going to add a lot of read latency due to the clock crossing. Depending on your cache size and the way your algorithms are coded this may lead to less performance than if everything was on the same domain. People usually create half-rate bridges to handle this assuming the two clocks are in phase.
