Forum Discussion
Altera_Forum
Honored Contributor
19 years agoThe problem with parameters inside your verilog source during sopc component generation is not new (but mostly fixed)
if you add a source.v as a hdl file inside the sopc component editor then in priviously versions you couldn't have a struct like mymodule ( .... ); parameter EnableLCD = 1; quartus itself can deal with such parameters, but during sopc component editor this was not possible. i had to remove such parameters, do the sopc job and then re-add the parameter. Quartus 6.1 and Quartus 7.0 can handle such parameters.