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Altera_Forum's avatar
Altera_Forum
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22 years ago

hw multiplier for Cyclone

With NIOS-1 i could select three implementations for multiplications (sw, mul_step, mul). In Nios-2 this feature is complety missing. Is there any way to tell the SOPC-Builder for NIOS-2 to integrate...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
22 years ago

What he is trying to say is if you put this big massive multiplier out there things will slow down (multipliers implmented in LEs are pretty big).

Currently I've been finding that even thought the Stratix has multipliers implmented in DSP blocks, it is the main factor in your fmax with NIOS II.

Without the DSP blocks doing a hardware multiplier you will have to make a comprimise somewhere.

That's why I was suggesting one that was bitwise (around 35 clock cycles). It would be as slow as the division but it would be small and pretty fast.