Honored ContributorHello,
Has anybody some good information about writing an Avalon master? I need a component which has one master read port and one slave port (for configuration). I searched a lot of documents for writing a master but without success. An example would be great! Thank you in advance, niosIIuser
Honored ContributorHi niosIIuser,
I posted a test peripheral I made for someone on this subject in the downloads area: http://www.niosforum.com/forum/index.php?a...t=st&f=15&t=508 (http://www.niosforum.com/forum/index.php?act=st&f=15&t=508) Have fun!Honored ContributorHello Jesse,
Many thanks for your help. That was nearly exactly what I was looking for. I think it will not be too hard to port your code into VHDL (is there any translator?) and replace the write master with a read master. Thanks, niosIIuser
