Honored Contributor
Honored Contributor
i would like to see dedicated ip for serial dacs and adcs. using spi looks doable but the 24 bit stuff is a challange. i had max+ii logic in schematic form but would like to see vhdl or verilog for standard parts.
i found these files useful ...
c:\altera\kits\nios2\components\altera_avalon_spi\hal\src\altera_avalon_spi.c
c:\altera\kits\nios2\components\altera_avalon_spi\hal\inc\altera_avalon_spi.h
c:\altera\kits\nios2\components\altera_avalon_spi\inc\altera_avalon_spi_regs.h
c:\altera\kits\nios2\components\altera_avalon_spi\sdk\spi_struct.h --- Quote End --- could you give the document of spi ? what i use now is niosI ,so there are no copy of that ,thank you for giving me the doc!
