How to use NIOS SignalTap II?

I think you are a bit confused about what Signal Tap II does.

Signal Tap II is an onchip logic analyzer to allow you to sample signals within your FPGA (so that you don't have to route I/O and probe them with an external analyzer).

Signal Tap II works on any FPGA with onchip RAM blocks (Stratix, Stratix II, Cyclone, Cyclone II, Apex, etc... So any Nios development board will support it)

The trigger condition is the set of conditions required for Signal Tap II to start sampling.

So in a nutshell (typical usage):

Signal Tap II becomes embedded in with the rest of your hardware.

It has some onchip memory allocated to it to store data samples.

It sits there doing nothing until the trigger condition is met.

When the trigger occurs on every clock cycle it stores the data it is sampling into the onchip memory.

When it fill the onchip memory allocated to it, the results are sent back.

Here's a good document explaining how to use it:

http://www.altera.com/literature/an/an323.pdf (http://www.altera.com/literature/an/an323.pdf)