How to use M4K in ep1c6

That megacore or altsyncram I would recommend. If you type either of those names into the Quartus II help you will get a data sheet for the lpm function.

My question for you is will this DP ram be used in SOPC Builder? If so, you can drop an onchip memory into your system and use it in dual port mode in the memory configuration wizard (check box near the top). One word of caution is to make sure you don't do parallel access to DP Ram at the same address (you probably already know that, just making sure).

Hi:

Yeah,I want to design a dpram (which have one read port and one write port) in sopcbuilder to work as a fifo, when I open the sopc and add the component of onchip-memory to my system , I check the "RAM" and "Dual Port " , but I didn't configure the "onchip_memory " to "one read and one port" because of not any choice appearing. how can I do? Can anyone help me?

Hardware or software based fifo? If you want the FIFO to be HW based (i.e. you write to one location and read from the other) then I recommend the fifo lpm (lpm_fifo I think is the name of it). You should be able to tell it to make it out of LEs or memory (and it'll handle the control logic for you). So you can just take that and put a little bit of glue logic on the front side of the FIFO to make it an Avalon slave (use component editor to import it into SOPC builder). If you go to the IP section of the forum I think someone posted a FIFO component (I haven't looked at it but I'm guessing that's how it is designed).

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but I didn&#39;t configure the "onchip_memory " to "one read and one port" because of not any choice appearing[/b]

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You get a true dual port RAM using this memory (two input, two output both ports capable of reading and writing). You could make a FIFO out of that too but it&#39;s overkill for a FIFO.