Honored Contributor
Honored ContributorETS is a neat concept but it is used for signal frequencies in the MHz. If your sinewave is 50Hz, then you have no reason to be using ETS.
1) What is the FPGA's sample frequency. If your base clock is 50MHz, then even by sampling with NIOS you should get at least 10kHz (just approximating) of ADC sampling rate. Use a timer to trigger ADC reads (in the timer ISR) 2) Buffer the samples in a FIFO, on chip ram, or sdram 3) Transmit data from FIFO to PC using USB (what is your baud rate - 9600, 115200 ??). 4) Reconstruct in Matlab - you know the sampling rate of your data (see 1), you can reconstruct your signal - there will be a delay but that shouldn't be a problem, unless you want exactly real time....
