Forum Discussion
Altera_Forum
Honored Contributor
20 years agoHi stonie,
I had a similar problem ... I wanted to keep the Nios-II core in reset, but still write to sdram via a PCI bridge. But a reset of the system module also reset the SDRAM controller 8-P As it turns out, I ended up moving the sdram controller and the PCI bridge (and some PCI accessible control registers) out of the SOPC system module that contained the Nios-II. Basically, I ended up with two system modules: 1-with the Nios-II core and various I/O, and 2-with the SDRAM controller. The PCI bridge (and control regs) were external to both. The system module with the SDRAM controller had two slave interfaces (one for the Nios-II module and the other for the PCI bridge). This structure was a pain-in-the-@$$, but it let me keep separate resets without having to hack things up. An independent "CPU reset" signal from the system module would certainly make like easier (hint hint). Regards, --Scott