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Altera_Forum's avatar
Altera_Forum
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21 years ago

how to reduce the size of nios soft core?

SOPC builder compiles some files automatically, such as pio_lcd16207.c, but i don't want to include this

file and it isn't used, either. I want to cut this file to save LEs of FPGA after compilation. I want to make

the nios core thinner.how can I make it???

thank u. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    .c files contain software, not hardware. Compiling these files doesn&#39;t make your core any larger. If you have components in your system that you don&#39;t use, you can remove the hardware by right-clicking on the file in SOPC Builder and selecting remove.

  • Altera_Forum's avatar
    Altera_Forum
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    i forgot to mention that i didn&#39;t use the nios development board of altera. I just wrote codes and then

    put them in the rom of nios cpu without flash to store the object codes. So i think that the bigger my

    codes are, the more LEs will be used. Right?
  • Altera_Forum's avatar
    Altera_Forum
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    Go into the Nios II IDE and create a new "Hello Freestanding" project. This is intended for more advanced users who want to squeeze every last byte out - the source code has comments that can assist you.

    What you will want to do is build the free-standing example, and then alter the "alt_sys_init()" code we generate -- this function basically calls the initialization routines of the various peripherals in your system... you can just comment out the ones you dont want to use to save space.

    A note, though, if you modify the file with this alt_sys_init code, it will be over-written if you re-build (auto-generated file), it would be best to save your changes as your own source file/subroutine name and call that during boot-up.

    PS: Before you do this, you might also consider building the hello_world example and looking at the comments in its sorce file; it has instructions to reduce code size without switching over to the "freestanding" example.
  • Altera_Forum's avatar
    Altera_Forum
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    Did you have that LCD core originally and take it out? If so did you also re-generate the NIOS (because what you are describbing shouldn&#39;t happen).

    Like what was said before, the code will not affect you&#39;re resource size (LEs). Basically the hardware is generated first then you&#39;re software is built using the characteristics of the system itself (that&#39;s why I&#39;m wondering if you re-generated the NIOS or not).

    To get extra optimization you can us the -O3 parameter for the build (if you build from the prompt that is, otherwise I&#39;m not sure if there is any other way). By default the software builds using -O2 optimization, I haven&#39;t really noticed a difference between -O3 and -O2 but you might.

    So the first step is to go into the SOPC and take a look at what&#39;s a part of the system you are generating with the NIOS
  • Altera_Forum's avatar
    Altera_Forum
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    I didn&#39;t use the LCD core. I don&#39;t have the dev board. I think the pio_lcd16207.c file is generated for the dev

    board and the germs_monitor.c&#39;s fucntion is the same. I have the idea to reduce nios soft core because I

    see the following info when generating system:

    # 2004.08.12.22:41:12 --- Compiling nios_uart.c

    # 2004.08.12.22:41:12 --- Assembling nios_zerorange.s

    # 2004.08.12.22:41:12 --- Compiling pio_lcd16207.c

    # 2004.08.12.22:41:12 --- Assembling pio_showhex.s

    # 2004.08.12.22:41:12 --- Compiling plugs.c

    Above is a part of the info. And also I don&#39;t want to compile the nios_uart.c file because I don&#39;t use the UART

    now. Is that clear? Maybe Jesse got it, but he answered about the nios II. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif

    thank you.
  • Altera_Forum's avatar
    Altera_Forum
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    If it&#39;s just code being created I wouldn&#39;t worry about it then. But check the core in the project breakdown to make sure it&#39;s not in there somewhere as a design module.