How to make sure nios send a single cycle control signal to peripheral?

First, you are not testing if the CPU is reading or writing your component. While this doesn't have any impact in your case as you are using two different addresses it is best to only perform a write operation when the CPU actually intends to write. Usually when I design an avalon slave, I prefer to use the read and write control signals instead of chipselect and write_n.

Second, in some cases, when accessing a 8-bit bus, the NIOS CPU performs 4 accesses to get a 32-bit value. I don't remember in which cases it does it, but now I don't bother anymore and always use 32-bit data busses even if I just have 8-bit values to exchange.