How to freeze NIOS2 during sensitive measurement?

If possible, make sure your output pins are configured for slow-slew rate, and layout your board so the low-order address bus bits are as short as possible.

Slow-slew-rate is implemented in Quartus5.1 by selecting the Assignments\Pins menu. Then do:

Select I/O features, and add the relevant pins (you can do just one under "To"). Choose Assignment Name "Current Strength", Value "Minimum Current", Enabled "Yes". (make sure this is compatible with the devices you're driving - check it with a 'scope)

Select I/O timing, "Slow Slew Rate", "On", "Yes". (again make sure this is compatible to avoid double-triggering)

We also used "Weak Pull-up Resistor" "Off" on the CLK input.

Use a multilayer board, with ground planes. Can the SOPC+SRAM if possible, otherwise use EMI-fingers/gaskets between the board and a metal case.

Make sure analogue and digital grounds are separate.

Try using internal RAM/ROM for your tight loops, although the address bus will continue to sing.

If you can borrow a spectrum analyser it would be an advantage; we have one in-house and it was very useful for establishing EMC.

Lastly, you could put the analogue and digital circuitry on separate boards, and use a differential-input ADC such as the following as the input to the digital circuit:

http://www.maxim-ic.com/appnotes.cfm/an_pk/1108 (http://www.maxim-ic.com/appnotes.cfm/an_pk/1108)

http://www.analog.com/en/prod/0,,ad7450,00.html (http://www.analog.com/en/prod/0,,ad7450,00.html)

http://ww1.microchip.com/downloads/en/appn...-input%20adc%22 (http://ww1.microchip.com/downloads/en/appnotes/00842a.pdf#search=%22differential-input%20adc%22)