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Altera_Forum
Honored Contributor
Honored ContributorHow to deal with the additional address line?
I use IUL in SOPC to add a memory slave peripheral.I add 18 address line (add[17..0]) and then in the Quartus it appears add[19..0], I read the datasheet of AvalonBus about Dynamic bus sizing. B...
Altera_ForumHonored Contributor
Honored ContributorIf your peripheral has a native data width between 17 and 32 bits then this sounds correct (would want to access 4 bytes at a time so A[0] and A[1] are not needed).
Fischer the change you are referring to appears in SOPC Builder 4.2 and up. It was specific to native tri-state slaves (in short before 4.2 they did not behave the way you describbed and now they do). If you can describe your peripheral and the bus it is connected to we can give you a better answer.
