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Altera_Forum's avatar
Altera_Forum
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16 years ago

How to constrain the JTAG in SOPC Builder

Hello everyone: I have a DK-DSP-3C120N kit.Recently,I'm struggling with the DDR2 HP Controller under the direction of AN517(Using High-Performance DDR, DDR2, and DDR3 SDRAM With SOPC Builder)....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

The error is not related to your DDR2 or NIOS clocks. You are obviously using an IP core in OpenCore Plus evaluation mode (because you don't have a license for it). All that is happening is there is a path failing on the JTAG clock domain with regards to the OpenCore evaluation mode.

I would just ignore the error and move on with life.

Jake